Differential amplifier

ABSTRACT

A differential amplifier for amplifying an input differential signal having two components (In+, In−) substantially in anti-phase to each other and generating an output differential signal having two differential components (Out+, Out−). The amplifier comprises a pair of inverters coupled to a pair of adders the inverters receiving the input differential signal. The amplifier is characterized in that it further comprises a pair of controllable buffers for receiving the input differential signal and outputting a signal to the pair of adders. A bias of the said pair of buffers is cross-controlled by the input differential signal for controlling an amplification of said pair of controllable buffers.

The status of all parent priority applications as of Mar. 1, 2006, is asfollows: Priority Application EP02076400.7 is now abandoned.

The invention relates to a differential amplifier according to thepreamble of claim 1.

The invention further relates to a receiver comprising the differentialamplifier.

Differential amplifiers are widely used in various applications becausethey provide a relatively good common mode rejection ratio andrelatively high output signal ranges e.g. theoretically the outputsignal range could be double as a range that could be obtained with asingle ended amplifier. When they are used as input amplifiers they haveto provide a relatively low noise and a linear amplification. In moderncommunication circuits these features have to be obtained having inputsignals situated in a relatively high frequency range i.e. GHz thecircuits being supplied by a relatively low voltage.

A possible solution could be as in U.S. Pat. No. 4,887,047. In thispatent it is presented a differential amplifier usable in medicalapplications. The input signals are considered to be currents, saidsignals being DC free i.e. they have no DC component. The amplifier hasnonlinear input impedance and a differential cross-coupled transistorpair. Current mirrors supplied by a current source for obtaining an ashigh as possible amplification are provided. The currents provided bythe current sources and by the differential cross—coupled transistorpair are added to each other in the output nodes, the output nodesacting as a current adder. It is observed that the transistors includedin the differential cross—coupled transistor pair acts as inverters i.e.a phase shift between the output signal and the input signal issubstantially 180 degrees. It should be emphasized that the medicalsignals are impulse shaped current signals and the differentialamplifier has to sense and to amplify these signals. The amplifiersenses the edges of the input signals providing at it's output impulseshaped signals whenever a transition from a low level to a high level orfrom a high level to a low level occurs in the input signal. It isobserved that this amplifier is not suitable to be used in communicationcircuits because it does not provide a linear amplification when theinput signals have a smooth continuous transition from a low level to ahigh level i.e. they are not pulse shaped. Furthermore, the circuit isnot suitable to be used with signals having a DC component. It isfurther observed that the noise performance of this circuit is realizedusing a nonlinear input device i.e. a diode and a small input impedance.These solutions are not suitable for high frequency amplifiers used incommunications.

It is therefore an object of the present invention to provide adifferential amplifier having an improved linearity and better noiseimmunity.

In accordance with the invention this is achieved in a device asdescribed in the introductory paragraph which is characterized in thatthe amplifier further comprises a pair of controllable buffers forreceiving the input differential signal and for outputting a signal tothe pair of adders, a bias of the said pair of buffers beingcross-controlled by the input differential signal for controlling anamplification of said pair of controllable buffers. An amplification ofthe buffers depends on the input signals such that the linearity isinsured for relatively large amplitude signal ranges. In the same timethe control of the buffers bias improves the noise figure of theamplifiers because the noise is dependent on the bias.

In an embodiment of the invention the pair of inverters and the pair ofcontrollable buffers are voltage to current converters. This feature isimportant for modern communication systems, wired or wireless where alarge majority of signals are voltage signals. Because the amplifierprovides at it's output current signals the adders are relatively easierto be implemented reducing the cost of the amplifier.

In another embodiment of the amplifier adders comprises a seriescombination of two resistive means. This is the simplest way toimplement the adder. A ratio between the resistors included in the adderdetermines the amount of positive feedback that determines the overallamplification of the amplifier.

In an embodiment of the amplifier the differential amplifier is coupledto a current to voltage converter for adapting a current typedifferential input signal to a voltage type differential signal saidvoltage being inputted to the differential amplifier. It is observedthat some of the communication systems as optical networks provides attheir inputs optical transducers e.g. photo-transistors an output signalof these transducers being current type signals. Hence, the current typesignals have to be first converted into a voltage the respective voltagebeing inputted to the differential amplifier. This feature increases theversatility in applications of the differential amplifier according tothe invention.

In another embodiment of the invention the pair of inverters comprises apair of common-emitter coupled transistors. Furthermore, the paircontrollable buffers comprises a pair of common-base transistors. Thecommon-base transistors are cross-coupled to the differential inputsignal via capacitive means for removing a DC component included in thedifferential input signal. The DC bias of the common-base transistorsand common-emitter transistors is realized with current sources whilethe bias of the common-base transistors is further controlled by theinput signal. The control signal is DC free for implementing a controldepending only on an AC component of the input signal. Hence the controldepends only on the variable part of the input signal, the variable partof the input signal carrying the useful information in the input signal.This control implements a feedback from the input to the buffersimproving the overall stability of the differential amplifier and it'slinearity.

In another embodiment of the amplifier the pair of common-emittertransistors has a first feedback means for controlling an amplificationof said pair of transistors. The first feedback means also increase theinput impedance for better adapting the common-emitter pair to a voltagetype input signal. In the same time the linearity of the amplifierincreases.

In another embodiment of the invention the pair of common-basetransistors comprises a pair of second feedback means for adapting aninput impedance of the pair of common-base transistors to an outputimpedance of a generator, said generator transmitting the differentialinput signal. The second feedback means increases the input impedance ofthe common-base transistors and, in the same time, improves thelinearity of the amplifier.

In an embodiment of the invention a receiver comprises the differentialamplifier. Because of it's improved linearity and noise figure, thedifferential amplifier is used as a Low Noise Amplifier (LNA) in areceiver, said LNA being the input stage in the receiver.

The above and other features and advantages of the invention will beapparent from the following description of exemplary embodiments of theinvention with reference to the accompanying drawings, in which:

FIG. 1 depicts a differential amplifier according to the invention,

FIG. 2 depicts a differential amplifier implemented with voltage tocurrent converters according to an embodiment of the invention,

FIG. 3 depicts an adder according to another embodiment of theinvention,

FIG. 4 depicts an amplifier adapted to current type input signalsaccording to an embodiment of the invention,

FIG. 5 depicts an amplifier implemented with bipolar transistorsaccording to an embodiment of the invention,

FIG. 6 depicts a receiver using the amplifier according to anotherembodiment of the invention.

FIG. 1 depicts a differential amplifier according to the invention. Theamplifier is adapted to process differential input signals, said signalshaving two components In⁺, In⁻, substantially in anti-phase to eachother. The amplifier comprises a pair of inverters 10 cross-coupled to apair of adders 30, the inverters 10 receiving the input differentialsignal. The amplifier further comprises a pair of controllable buffers20 for receiving the input differential signal and outputting a signalto the pair of adders 30. A bias of the said pair of buffers beingcross-controlled by the input differential signal for performing alinear amplification of the input signal. It is observed any adder 30receives two in-phase signals one signal being generated by acontrollable buffer 20 and by an inverter 10. Hence the output signalhas a relatively large value. When relatively large input signals areprovided the amplifier could limit their amplitude i.e. a nonlinearbehavior that is not desired in a linear amplifier. Therefore, afeedback is provided to control the bias of the buffers. When arelatively large voltage In⁺ appears, a relatively large anti-phasevoltage In⁻ also appears. The anti-phase voltage determines amodification of the bias voltage of the buffer 20 determining a decreaseof an amplification of the buffer. This decrease further determines thatan output differential signal is transmitted without distortions and theoverall amplification of the amplifier is linear. The amplifiers arevoltage controlled and could be operational amplifiers, transconductanceamplifiers, CMOS buffers and inverters.

FIG. 2 depicts a differential amplifier implemented with voltage tocurrent converters according to an embodiment of the invention. In thisembodiment of the invention the pair of inverters 10 and the pair ofcontrollable buffers 20 are voltage to current converters. This featureis important for modern communication systems, wired or wireless, inwhich a large majority of signals are voltage signals. Because theamplifier provides at it's output current signals the adders arerelatively easier to be implemented reducing the cost of the amplifier.The voltage to current converters could be for instance transconductanceamplifiers, bipolar or CMOS transistors, using materials as Si, SiGe,GaAs.

FIG. 3 depicts an adder according to another embodiment of theinvention. Considering that a current outputted by a buffer is Ib and acurrent outputted by an inverter is Ii then an output voltage e.g. OUT⁺is as described in equation 1.OUT⁺ =R(1+x)Ib+xRIi  (1)It results that the amplification depends on the resistors ratio x.Making these resistors controllable it is easier to control theamplification of the amplifier.

FIG. 4 depicts an amplifier adapted to current type input signalsaccording to an embodiment of the invention. The differential amplifieris coupled to a current to voltage converter for adapting a current typedifferential input signal to a voltage type differential signal. Theobtained voltage is inputted to the differential amplifier. It isobserved that some communication systems as optical networks provide attheir inputs optical transducers e.g. phototransistors. An output signalof these transducers is a current type signal. Hence, the current typesignals have to be first converted into a voltage the respective voltagebeing inputted to the differential amplifier. This feature increases theversatility in applications of the differential amplifier according tothe invention. Furthermore this helps in standardization of various typeof amplifiers.

FIG. 5 depicts an amplifier implemented with bipolar transistorsaccording to an embodiment of the invention. In FIG. 5 transistor pairT1, T2 is identified as pair of inverters 10 in FIG. 1. Analogously,transistor pair T3, T4 is identified as pair of controllable buffer 20.Current sources I1 and I2 bias the transistor pairs T1, T2 and T3, T4respectively. It is observed that capacitive means 40 are provided forcontrolling the bias of the pair of controllable buffers. It is furtherobserved that a first feedback means R1 is coupled between the emittersof the transistors T1, T2. A second feedback resistor means R2 arecoupled to the emitters of the transistor pair T3, T4. The transistorpair T1, T2 is in so-called common emitter connection. The transistorpair T3, T4 is in so-called common base connection. The first resistivefeedback R1 increases the input impedance of the amplifier, reducing theamplification. In this way larger input signals could be inputted to thestage. The second resistive feedback R2 increases the input impedance ofthe common base stage reducing in the same time the overallamplification of the stage. It is observed that the collector current ofT2 is added to the output current of T3 in an adder implemented with theresistors R and xR. Analogously, the collector current of T1 is added tothe current of the collector current of T4. In the same time a DC freesignal depending on the input signal is inputted to the bases oftransistors T2 and T3, said signal being substantially in anti-phase tothe signal in their collectors. Hence, when In⁺ is large the DC freefeedback signal determined by In⁻ signal reduces the base current of T3,reducing the amplification of the stage. Therefore, the feedbackincreases the linearity of the stage. It has to be observed that theconcept presented in this invention could be implemented with pnpbipolar transistors, with CMOS transistors as obviously results for askilled person in the art. There is a straightforward correspondencebetween base, emitter and collector terminals and gate (grid), sourceand drain terminals respectively. Furthermore, the circuit using npnbipolar transistors is equivalent to the circuits implemented with nchannel CMOS transistors and the circuit implemented with pnp bipolartransistors is equivalent to circuit implemented with p-channel CMOStransistors.

FIG. 6 depicts a receiver 500 using the amplifier 1 according to anotherembodiment of the invention. The amplifier 1 is used as a low noiseamplifier (LNA) receiving a differential input signal and generating adifferential output signal. The differential output signal is inputtedto a pair of mixers 2 for combining with a periodical quadrature signalgenerated by a synthesizer 6, said synthesizer including a quadraturevoltage control oscillator (VCO). The periodical signal could haveeither a frequency that equals a frequency of a carrier of the inputsignal or a different frequency. In the first case we have aheterodyning receiver and in the second case we have a zero-IF receiver.The signal generated by the mixer 2 is inputted to automatic gaincontrol amplifier (AGC) 3 for being further amplified. An amplifiedsignal generated by the AGC amplifier 3 is inputted to a filter 4. Inthe case of the heterodyning receiver the filter is a band-pass filterand in the case of zero-IF receiver the filter is a low-pass filter. Afiltered signal generated by the filter 4 is transmitted for furtherprocessing via output buffers 5, said buffers being conceived to performan adaptation to further processing stages of a receiver system.

It is remarked that the scope of protection of the invention is notrestricted to the embodiments described herein. Neither is the scope ofprotection of the invention restricted by the reference numerals in theclaims. The word ‘comprising’ does not exclude other parts than thosementioned in the claims. The word ‘a(n)’ preceding an element does notexclude a plurality of those elements. Means forming part of theinvention may both be implemented in the form of dedicated hardware orin the form of a programmed purpose processor. The invention resides ineach new feature or combination of features.

1. A differential amplifier (1) for amplifying an input differentialsignal having two components (In⁺, In⁻) substantially in anti-phase toeach other and generating an output differential signal having twodifferential components (Out⁺, Out⁻), said amplifier (1) comprising apair of inverters (10) coupled to a pair of adder components (30), eachadder component comprising a resistor, the inverters (10) receiving theinput differential signal, the amplifier (1) being characterized in thatit further comprises a pair of controllable buffers (20) for receivingthe input differential signal and outputting a signal to the pair ofadder components (30), a bias of the said pair of buffers beingcross-controlled by the input differential signal for controlling anamplification of said pair of controllable buffers (20).
 2. Adifferential amplifier (1) as claimed in claim 1, wherein the pair ofinverters (10) and the pair of controllable buffers (20) are voltage tocurrent converters.
 3. A differential amplifier (1) as claimed in claim2, wherein the pair of adder components (30) comprises a seriescombination of resistive means (R, xR).
 4. A differential amplifier (1)as claimed in claim 2, wherein the differential amplifier (1) is coupledto a current to voltage converter (100) for adapting a current typedifferential input signal (C⁺, C⁻) to a voltage type differential signal(In⁺, In⁻) said voltage being inputted to the differential amplifier(1).
 5. A differential amplifier (1) as claimed in claim 2, wherein thepair of inverters (10) comprises a pair of common-emitter coupledtransistors (Tl, T2).
 6. A differential amplifier (1) as claimed inclaim 3, wherein the pair of controllable buffers (20) comprises a pairof common-base transistors (T3, T4).
 7. A differential amplifier (1) asclaimed in claim 6, wherein the pair of common-base transistors arecross-coupled to the differential input signal via capacitive means (40)for removing a DC component included in the differential input signal.8. A differential amplifier (1) as claimed in claim 6, wherein the pairof common-emitter transistors (T1, T2) has a first feedback means (R1)for controlling an amplification of said pair of transistors (T1, T2).9. A differential amplifier (1) as claimed in claim 7, wherein the pairof common-base transistors (T3, 74) comprises a pair of second feedbackmeans (R2) for adapting an input impedance of the pair of common-basetransistors (T3, T4) to an output impedance of a generator, saidgenerator transmitting the differential input signal.
 10. A receiver(500) comprising a differential amplifier (1) as claimed in claim 1.